The device is used primarily as a 6-bit edge-triggered storage register. The device has a Master Reset to simultaneously clear all flip-flops. LOW 0. The LS is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements. Figure 1. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
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74LS174 (74LS174N) hex D-type flip flop - Signetics
DM74LS174N Fairchild Semiconductor, DM74LS174N Datasheet